Title :
An improved refinable rational approximation to the ideal time delay
Author :
Philipp, L.D. ; Mahmood, Ausif ; Philipp, B.L.
Author_Institution :
Washington State Univ., Richland, WA, USA
fDate :
5/1/1999 12:00:00 AM
Abstract :
Time delays are an integral part of high-speed circuits and control-system applications. Rational approximations to the Laplace transform of a time delay Td, i.e., e-T(ds) have been used in the past. These approximations include Pade, Bessel, and other variations. The disadvantage of such approximations is that the quality of the response can only be improved by increasing the order of approximation. In some cases, this results in unstable systems, e.g., a fifth-order Pade approximation with no zeros and five poles is unstable. In this paper, a new rational approximation for the ideal time delay is developed that offers a greater degree of precision and control over the type of response achievable within the same order. Comparisons of the errors between the step responses of the approximation developed here with that of Pade and Bessel show that the new approximation can be tuned to result in a stable operation and the lowest error
Keywords :
Bessel functions; approximation theory; control system synthesis; delay estimation; error analysis; function approximation; high-speed integrated circuits; rational functions; step response; Laplace transform; control-system applications; errors; high-speed circuits; ideal time delay; refinable rational approximation; stable operation; step responses; Capacitance; Circuit synthesis; Computer architecture; Delay effects; Design automation; Laplace equations; Power dissipation; Routing; Solid state circuits; Timing;
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on