Title :
Novel Readout Circuit Architecture for CMOS Image Sensors Minimizing RTS Noise
Author :
Martin-Gonthier, Philippe ; Magnan, Pierre
Author_Institution :
Integrated Image Sensor Lab., Univ. of Toulouse, Toulouse, France
fDate :
6/1/2011 12:00:00 AM
Abstract :
This letter presents a novel readout architecture and its associated readout sequence for complementary metal-oxide-semiconductor (CMOS) image sensors (CISs) based on switch biasing techniques in order to reduce noisy pixel numbers induced by in-pixel source-follower transistor random telegraph signal noise. Measurement results done on a test image sensor designed with 0.35-μm CIS technology demonstrate an efficient reduction of noisy pixel numbers without a pixel performance decrease.
Keywords :
CMOS image sensors; integrated circuit design; readout electronics; CMOS image sensors; RTS noise; complementary metal-oxide-semiconductor image sensors; in-pixel source-follower transistor random telegraph signal noise; readout circuit architecture; readout sequence; size 0.35 mum; switch biasing techniques; Image sensors; Noise; Noise measurement; Photodiodes; Pixel; Switching circuits; Transistors; CMOS image sensor (CIS); correlated double sampling (CDS); low frequency noise (LFN); noisy pixel reduction; random telegraph signal (RTS) noise;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2011.2127442
