A guide to engineering workstations: how ICs impact workstations

Author

Horning, Robert J. ; Forsyth, Mark ; Yetter, Jeff ; Thayer, Larry J.

Author_Institution

Hewlett-Packard Co., Fort Collins, CO, USA

Volume

28

Issue

4

fYear

1991

fDate

4/1/1991 12:00:00 AM

Firstpage

58

Lastpage

62

Abstract

The process employed by a group of workstation designers in creating a prototype for a high-performance, low-cost workstation is described. The design team moved an existing architecture-the precision-architecture, reduced-instruction-set computer (PA-RISC) design-into the realm of a low-cost desktop computer. The goal was to make a PA-RISC implementation suitable for a high-performance single-user workstation that would provide exceptional application and graphics performance, yet would also provide continuity with existing systems. It is shown how performance goals and design capabilities influenced decisions about what types of ICs should be used.<>

Keywords

engineering workstations; microprocessor chips; reduced instruction set computing; engineering workstations; graphics performance; high-performance; integrated circuits; precision-architecture; reduced-instruction-set computer; single-user workstation; Cache memory; Central Processing Unit; Coprocessors; Cost function; Design engineering; Graphics; Large scale integration; Process design; Prototypes; Workstations;

fLanguage

English

Journal_Title

Spectrum, IEEE

Publisher

ieee

ISSN

0018-9235

Type

jour

DOI

10.1109/6.76303

Filename

76303