Wafer charging in process equipment and its relationship to GMR heads charging damage

Author

Lukaszek, Wes

Author_Institution

Wafer Charging Monitors Inc., Woodside, CA, USA

Volume

24

Issue

2

fYear

2001

fDate

4/1/2001 12:00:00 AM

Firstpage

72

Lastpage

77

Abstract

Significant know-how and understanding of device charging damage in processing equipment exists in complementary metal oxide semiconductor (CMOS) integrated circuit (IC) manufacturing. This paper introduces the basic charging mechanisms responsible for gate oxide damage in CMOS ICs, illustrates these mechanisms with examples of measurements obtained in contemporary IC processing equipment, and shows how this knowledge could be applied to the control of charging damage in GMR heads wafer processing. A wafer charging characterization method successfully used by integrated circuit and equipment manufacturers to quantify wafer charging in process equipment is also described

Keywords

giant magnetoresistance; magnetic heads; magnetoresistive devices; surface charging; GMR heads; characterization method; charging damage; process equipment; processing equipment; wafer charging; wafer processing; CMOS integrated circuits; CMOS process; Electrodes; Insulation; Integrated circuit manufacture; Integrated circuit measurements; Magnetic heads; Manufacturing processes; Semiconductor device manufacture; Surface charging;

fLanguage

English

Journal_Title

Electronics Packaging Manufacturing, IEEE Transactions on

Publisher

ieee

ISSN

1521-334X

Type

jour

DOI

10.1109/6104.930956

Filename

930956