DocumentCode
1505923
Title
Impact of Lateral Asymmetric Channel Doping on 45-nm-Technology N-Type SOI MOSFETs
Author
Nayfeh, Hasan M. ; Rovedo, Nivo ; Bryant, Andres ; Narasimha, Shreesh ; Kumar, Ajit ; Yu, Xiaojun ; Su, Ning ; Kumar, Ajit ; Sleight, Jeffrey W. ; Robison, Robert R. ; Rausch, Werner ; Mallela, Hari ; Freeman, Greg
Author_Institution
Semicond. R&D Center, IBM, Hopewell Junction, NY, USA
Volume
56
Issue
12
fYear
2009
Firstpage
3097
Lastpage
3105
Abstract
Lateral asymmetric channel doping is applied to 45-nm technology NFET devices. The measured effective drain-current enhancement over coprocessed symmetric control devices is 10%. Analysis reveals that the dominant physical mechanism, which accounts for two-third of the total enhanced drain current, is an 8% increase in the source-side injection velocity. The remaining one-third is attributed to the decreased drain-induced barrier lowering. This paper concludes with an analysis of the switching characteristics of CMOS inverters composed of an asymmetric NFET and a companion symmetric PFET and shows a 5% improvement in the delay. The improvement is explained in terms of the increased velocity and 30% reduction in drain junction capacitance.
Keywords
CMOS integrated circuits; MOSFET; invertors; silicon-on-insulator; CMOS inverters; N-type SOI MOSFET; asymmetric NFET; drain-current enhancement; lateral asymmetric channel doping; size 45 nm; source-side injection velocity; switching characteristics; symmetric PFET; Capacitance; Delay; Doping; Fabrication; Helium; Implants; Inverters; MOSFETs; Research and development; Silicon on insulator technology; Asymmetric MOSFET; MOSFET; deeply scaled CMOS; floating body; silicon on insulator (SOI);
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2009.2032750
Filename
5291762
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