DocumentCode
1505991
Title
On the quality of accumulator-based compaction of test responses
Author
Chakrabarty, Krishnendu ; Hayes, John P.
Author_Institution
Dept. of Electr. & Comput. Eng., Boston Univ., MA, USA
Volume
16
Issue
8
fYear
1997
fDate
8/1/1997 12:00:00 AM
Firstpage
916
Lastpage
922
Abstract
The accumulator-based compaction (ABC) technique uses an accumulator to generate a composite fault signature for a circuit under test. The error coverage for this method has been previously analyzed using Markov chains. We describe an alternative technique for calculating the error coverage of ABC using the asymmetric error model. This technique relies on the central limit theorem of statistics and can be applied to other count-based compaction schemes. Our analysis shows that ABC provides very high coverage of asymmetric errors. Experiments on the actual fault coverage for the ISCAS 85 benchmark circuits show that extremely high postcompaction fault coverage (close to 100%) is obtained with ABC. They also indicate that the use of a rotate-carry adder does not always improve the fault coverage; in some cases, the fault coverage is actually reduced
Keywords
adders; built-in self test; error detection; integrated circuit testing; statistical analysis; ISCAS 85 benchmark circuit; accumulator-based compaction; asymmetric error model; central limit theorem; circuit under test; composite fault signature; error coverage; fault coverage; rotate-carry adder; statistics; test response; Adders; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Compaction; Counting circuits; Hardware; Registers; Statistics;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.644618
Filename
644618
Link To Document