A Distortion-Compensated Charge Transfer Amplifier for a 1.66-MHz Cyclic Pipeline ADC

Author

Sandhu, Tejinder Singh ; El-Sankary, Kamal ; El-Masry, Ezz

Author_Institution

Dept. of Electr. & Comput. Eng., Dalhousie Univ., Halifax, NS, Canada

Volume

57

Issue

7

fYear

2010

fDate

7/1/2010 12:00:00 AM

Firstpage

507

Lastpage

511

Abstract

A distortion-compensated charge transfer amplifier (DCCTA) is proposed to improve the linearity constraints of the differential charge transfer amplifier (DCTA). The proposed DCCTA effectively reduces distortion at its output by source degeneration, cross coupling, and making the drain-to-source voltage of the amplifying transistor independent of the applied input signal. This DCCTA yields an effective number of bits of 9.26 bits, compared with 6.05 bits for the DCTA at 40 MHz while consuming only 13.5 μW from a 1.2-V source. A 1.66-MHz cyclic pipeline analog-to-digital converter employing this DCCTA as a residue amplifier was simulated using 90-nm CMOS process, resulting in a peak resolution of 9.21 bits, without being limited by the thermal noise.

Keywords

CMOS analogue integrated circuits; amplifiers; analogue-digital conversion; charge exchange; integrated circuit noise; CMOS process; cross coupling; cyclic pipeline ADC; cyclic pipeline analog-to-digital converter; distortion-compensated charge transfer amplifier; drain-to-source voltage; frequency 1.66 MHz; frequency 40 MHz; linearity constraints; power 13.5 muW; residue amplifier; size 90 nm; source degeneration; thermal noise; voltage 1.2 V; Charge transfer amplifier; cyclic pipeline analog-to-digital converter (ADC); distortion compensation;

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2010.2048389

Filename

5475184