Title :
A Junctionless Nanowire Transistor With a Dual-Material Gate
Author :
Lou, Haijun ; Zhang, Lining ; Zhu, Yunxi ; Lin, Xinnan ; Yang, Shengqi ; He, Jin ; Chan, Mansun
Author_Institution :
Key Lab. of Integrated Microsyst., Peking Univ., Shenzhen, China
fDate :
7/1/2012 12:00:00 AM
Abstract :
A dual-material-gate junctionless nanowire transistor (DMG-JNT) is proposed in this paper. Its characteristic is demonstrated and compared with a generic single-material-gate JNT using 3-D numerical simulations. The results show that the DMG-JNT has a number of desirable features, such as high ON-state current, a large ON/OFF current ratio, improved transconductance Gm, high unity-gain frequency fT, high maximum oscillation frequency fMAX, and reduced drain-induced barrier lowering. The effects of different control gate ratios Ra and varied work-function differences between the two gates are studied. Finally, the optimization of Ra and the work-function difference for the proposed DMG-JNT is presented.
Keywords :
MOSFET; nanoelectronics; nanowires; semiconductor quantum wires; DMG-JNT; ON/OFF current ratio; Ra optimization; control gate ratios; dual-material gate junctionless nanowire transistor; high ON-state current; maximum oscillation frequency; reduced drain-induced barrier lowering; transconductance; unity-gain frequency; varied work-function differences; Doping; Logic gates; Metals; Semiconductor process modeling; Threshold voltage; Transconductance; Transistors; Dual-material gate (DMG); junctionless; nanowire; numerical simulation; single-material gate (SMG);
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2012.2192499
