Title :
New high-density multilayer technology on PCB
Author :
Shimoto, Tadanori ; Matsui, Koji ; Kikuchi, Katsumi ; Shimada, Yuzo ; Utsumi, Kazuaki
Author_Institution :
Functional Mater. Res. Labs., NEC Corp., Kawasaki, Japan
fDate :
5/1/1999 12:00:00 AM
Abstract :
Demand has recently increased for very high-density packaging substrates for high-pin-count area array chips. Our new high-density multilayer technology on printed circuit board (PCB), named deposited substrate on laminate (DSOL) satisfies this demand. An important feature of the DSOL is dielectric fabrication, which uses a new photosensitive material; an aromatic fluorene unit bonded epoxy acrylate resin. The fluorene based resin has interesting properties such as good electrical properties, low curing temperature (160°C) for a heat-resistant resin (glass transition temperature, Tg=230°C), low coefficient of the thermal expansion (40 ppm), and excellent via hole resolution. Very fine and high-aspect-ratio (>1.0) via holes were formed through exactly the same process steps as those used for a conventional photosensitive epoxy resin; baking, exposure, and development with an aqueous alkaline solution. Another important feature is the technology, that patterns fine-pitch Cu conductors using a semi-additive process with a sputtering method. The DSOL made 40 μM very fine pitch Cu conductors on large laminates (330 mm×400 mm) possible, because this process was composed of flash wet etching of only 0.3 μm thick sputtered thin-films. We have successfully developed a high-density packaging substrate for high-pin-count (4000 pins) area array application specific integrated circuit (ASIC) chips
Keywords :
application specific integrated circuits; fine-pitch technology; flip-chip devices; integrated circuit packaging; laminates; printed circuit manufacture; substrates; ASIC; Cu; aromatic fluorene; deposited substrate on laminate; dielectric fabrication; epoxy acrylate resin; fine-pitch Cu conductor; flash wet etching; flip-chip interconnection; high-density multilayer technology; high-pin-count area array chip; packaging; photosensitive material; printed circuit board; semi-additive process; sputtered thin film; Application specific integrated circuits; Dielectric materials; Dielectric substrates; Fabrication; Laminates; Nonhomogeneous media; Packaging; Printed circuits; Resins; Temperature;
Journal_Title :
Advanced Packaging, IEEE Transactions on
DOI :
10.1109/6040.763181