Title :
12-ps ECL using low-base-resistance Si bipolar transistor by self-aligned metal/IDP technology
Author :
Onai, Takahiro ; Ohue, Eiji ; Tanabe, Masamichi ; Washio, Katsuyoshi
Author_Institution :
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
fDate :
12/1/1997 12:00:00 AM
Abstract :
A self-aligned metal/IDP (SMI) technology is proposed to reduce the external base resistance and to enable fabrication of high-speed bipolar transistors. This SMI technology produces a self-aligned base electrode of stacked layers of metal and in situ-doped poly-Si (LDP) with a small thermal budget by selective tungsten CVD. It provides the low base resistance and a shallow link base for the small-collector capacitance and the high-cutoff frequency. The base resistance is reduced to a half that in a transistor having a conventional poly-Si base electrode. A maximum oscillation frequency of 81 GHz and a 12.2-ps gate delay time in an ECL ring oscillator at a voltage swing of 250 mV were achieved by using the SMI technology even with an ion-implanted base
Keywords :
bipolar transistors; elemental semiconductors; emitter-coupled logic; semiconductor technology; silicon; 12 ps; 250 mV; 81 GHz; ECL ring oscillator; SMI technology; Si; Si-W; base electrode; base resistance; collector capacitance; cutoff frequency; fabrication; gate delay time; high-speed Si bipolar transistor; in situ-doped polysilicon; ion-implanted base; link base; maximum oscillation frequency; selective tungsten CVD; self-aligned metal/IDP; stacked layer; thermal budget; Bipolar transistors; Capacitance; Cutoff frequency; Delay effects; Electrodes; Fabrication; Noise figure; Ring oscillators; Tungsten; Voltage-controlled oscillators;
Journal_Title :
Electron Devices, IEEE Transactions on
