Analysis of packet-switched multiple-bus multiprocessor systems

Author

Yang, Qing ; Bhuyan, Laxmi N.

Author_Institution

Dept. of Electr. Eng., Rhode Island Univ., Kingston, RI, USA

Volume

40

Issue

3

fYear

1991

fDate

3/1/1991 12:00:00 AM

Firstpage

352

Lastpage

357

Abstract

Performance analyses of packet-switched multiple-bus multiprocessor systems are presented. Approximate queuing network models are developed for both synchronous and asynchronous control schemes, and the results are shown to be in good agreement with simulation results. The analysis of the synchronous system is based on a decomposition technique, with each of the shared resources in the system being represented as a single-server queue. For asynchronous systems, the analysis is based on the flow equivalence technique. Numerical results obtained from the analyses indicate that packet-switched multiple-bus multiprocessors with only a few buses perform almost as well as crossbar-based multiprocessors

Keywords

multiprocessing systems; packet switching; performance evaluation; queueing theory; approximate queueing network models; asynchronous control; crossbar-based multiprocessors; decomposition; flow equivalence; packet-switched multiple-bus multiprocessor systems; performance analysis; single-server queue; synchronous control; Communication switching; Data communication; Master-slave; Multiprocessing systems; Multiprocessor interconnection networks; Network servers; Packet switching; Performance analysis; Queueing analysis; Switching circuits;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/12.76414

Filename

76414