DocumentCode
1508212
Title
A Gomory-Hu cut tree representation of a netlist partitioning problem
Author
Vannelli, Anthony ; Hadley, Scott W.
Author_Institution
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Volume
37
Issue
9
fYear
1990
fDate
9/1/1990 12:00:00 AM
Firstpage
1133
Lastpage
1139
Abstract
A VLSI design procedure is presented for finding netlist partitions. The method consists of approximating a netlist, which can be represented as a hypergraph, by an undirected graph with weighted edges. A Gomory-Hu cut tree allows one to generate netlist partitions for every pair of modules and estimate how far from optimality netlist cut is. Experimental results indicate that the netlist partitions are optimal or near-optical
Keywords
VLSI; circuit layout; network topology; trees (mathematics); Gomory-Hu cut tree representation; VLSI design procedure; hypergraph; modules; netlist cut; netlist partitioning problem; optimality; undirected graph; weighted edges; Circuits and systems; Councils; Joining processes; Microelectronics; Partitioning algorithms; Printed circuits; Scholarships; Tree graphs; Very large scale integration; Wires;
fLanguage
English
Journal_Title
Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0098-4094
Type
jour
DOI
10.1109/31.57601
Filename
57601
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