DocumentCode :
1508307
Title :
Secure random number generation using chaotic circuits
Author :
Bernstein, G.M. ; Lieberman, M.A.
Author_Institution :
Ford Aerosp. Corp., San Jose, CA, USA
Volume :
37
Issue :
9
fYear :
1990
fDate :
9/1/1990 12:00:00 AM
Firstpage :
1157
Lastpage :
1164
Abstract :
The authors suggest a class of circuits for generating secure pseudo-random numbers and estimate the security of these generators from the information loss property of chaotic systems. For a generator implemented using a chaotic DPLL (digital phase-locked loop), two important cases are considered: (1) given no prior information concerning the initial conditions of a continuously running circuit, the length of time one should wait after taking a bit before one can securely take another bit is established; and (2) given knowledge of the initial conditions at startup (up to measurement and noise uncertainty), the length of time one should wait before starting the bit sampling is shown
Keywords :
chaos; phase-locked loops; random number generation; DPLL; bit sampling; chaotic circuits; chaotic systems; continuously running circuit; information loss property; random number generation; secure pseudo-random numbers; startup; Chaos; Circuits; Information security; Length measurement; Measurement uncertainty; Noise measurement; Phase locked loops; Phase measurement; Random number generation; Time measurement;
fLanguage :
English
Journal_Title :
Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-4094
Type :
jour
DOI :
10.1109/31.57604
Filename :
57604
Link To Document :
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