A 0.76W/mm2 on-chip fully-integrated buck converter with negatively-coupled, stacked-LC filter in 65nm CMOS

A high-power-density buck converter of which active and passive components are fully integrated on a single CMOS chip is presented. To minimize the silicon area per inductance, a two-phase interleaving architecture with negatively-coupled inductors is adopted. Also, on-chip capacitors placed underneath the inductors further improves the power density by 20% without incurring the eddy current loss by routing the capacitor wires in the directions perpendicular to the inductor spiral. A prototype 550-MHz buck converter IC fully integrated with two 1.54-nH inductors and a 1.8-nF capacitor was designed and fabricated in a 65nm CMOS technology and demonstrates the peak power efficiency of 76% and power density of 0.76W/mm².