CAS-FEST 2010: Mitigating Variability in Near-Threshold Computing

Author

Seok, Mingoo ; Chen, Gregory ; Hanson, Scott ; Wieckowski, Michael ; Blaauw, David ; Sylvester, Dennis

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Univ. of Michigan, Ann Arbor, MI, USA

Volume

1

Issue

1

fYear

2011

fDate

3/1/2011 12:00:00 AM

Firstpage

42

Lastpage

49

Abstract

Near threshold computing has recently gained significant interest due to its potential to address the prohibitive increase of power consumption in a wide spectrum of modern VLSI circuits. This tutorial paper starts by reviewing the benefits and challenges of near threshold computing. We focus on the challenge of variability and discuss circuit and architecture solutions tailored to three different circuit fabrics: logic, memory, and clock distribution. Soft-edge clocking, body-biasing, mismatch-tolerant memories, asynchronous operation and low-skew clock networks are presented to mitigate variability in the near threshold V_DD regime.

Keywords

VLSI; clock distribution networks; clocks; VLSI circuit; asynchronous operation; body biasing; circuit fabric; clock distribution; low-skew clock network; mismatch-tolerant memory; near threshold computing; soft-edge clocking; variability; Clocks; Delay; Logic gates; Performance evaluation; Random access memory; Synchronization; Threshold voltage; Low voltage; near threshold computing; variability;

fLanguage

English

Journal_Title

Emerging and Selected Topics in Circuits and Systems, IEEE Journal on

Publisher

ieee

ISSN

2156-3357

Type

jour

DOI

10.1109/JETCAS.2011.2135550

Filename

5762379