Title :
High speed serial transceivers for data communication systems
Author :
Khoury, John M. ; Lakshmikumar, Kadaba R.
fDate :
7/1/2001 12:00:00 AM
Abstract :
The architecture and critical circuit design issues for high-speed serial data links operating in excess of 1 Gb/s are described. Trade-offs in power vs. performance are presented for SONET/SDH transceivers and backplane transceivers for Infiniband or similar standards
Keywords :
SONET; data communication; high-speed integrated circuits; integrated circuit design; optical communication equipment; synchronous digital hierarchy; transceivers; 1 Gbit/s; I/O buffer; IP; Infiniband; SONET/SDH transceivers; backplane transceivers; broadband high-frequency circuits; data communication systems; general-purpose chip-to-chip communications; high speed serial transceivers; high-speed circuit design; high-speed serial data links; performance; physical layer device architecture; power; similar standards; Backplanes; Circuits; Clocks; Data communication; Intersymbol interference; Optical signal processing; SONET; Synchronous digital hierarchy; Timing; Transceivers;
Journal_Title :
Communications Magazine, IEEE
