DocumentCode :
1511926
Title :
A redundant metal-polyimide thin film interconnection process for wafer scale dimensions
Author :
Michalka, Timothy L. ; Lukaszek, Wieslaw ; Meindl, James D.
Author_Institution :
Center for Integrated Syst., Stanford Univ., CA, USA
Volume :
3
Issue :
4
fYear :
1990
fDate :
11/1/1990 12:00:00 AM
Firstpage :
158
Lastpage :
167
Abstract :
The expected defect modes, and the predominance of a single mode, for wafer-scale interconnections produced using typical thin-film processing techniques are discussed. A process using redundancy in the vertical direction to eliminate the dominant defect mode is presented with calculations illustrating potential yield improvements. Experimental results of an implementation of the redundancy technique using a lift-off process with polyimide dielectric are presented. The process uses a repeatable elemental step capable of producing signal layers, via studs, or reference planes while maintaining good planarity. The basic precepts of the redundant process are verified
Keywords :
VLSI; integrated circuit technology; lithography; metallisation; polymer films; sputter etching; WSI; defect mode elimination; defect modes; lift-off process; metal-polyimide thin film interconnection; polyimide dielectric; redundant process; reference planes; signal layers; thin-film processing techniques; vertical direction-redundancy; via studs; wafer-scale interconnections; yield improvements; Dielectric thin films; Fabrication; Helium; Integrated circuit interconnections; Metallization; Polyimides; Signal processing; Substrates; Transistors; Very large scale integration;
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/66.61964
Filename :
61964
Link To Document :
بازگشت