• DocumentCode
    151211
  • Title

    Hybrid interleaving with adaptive PLL loop for adaptive on-time controlled switching converters

  • Author

    Pei-Hsin Liu ; Lee, Fred C. ; Qiang Li

  • Author_Institution
    Bradley Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA
  • fYear
    2014
  • fDate
    14-18 Sept. 2014
  • Firstpage
    4110
  • Lastpage
    4117
  • Abstract
    Recently, pulse distribution method and Phase Lock Loop (PLL) method have been widely used for adaptive on-time controlled multi-phase DC-DC converters. The former is simple, but suffers duty cycle jittering with ripple cancellation effect of current feedback. Besides, the transient response is impaired by inability to synchronize PWM signals among phases. The latter is less noise-sensitive and allows overlapping of the PWM signals for faster response. However, the stability problem of PLL loop occurs under wide duty cycle range, but there is no model to predict the issue so far. Moreover, the circuit complexity increases with one PLL loop per phase. This paper presents an accurate small-signal model of PLL loop based on describing function to provide feedback design guideline. Next, an adaptive PLL loop is proposed to auto-tune control bandwidth under wide duty cycle range. After that, hybrid interleaving structure is proposed to significantly reduce the circuit complexity of PLL method, while remains comparable transient performance. Finally, the simulation and experimental results confirm the model accuracy and the effectiveness of proposed methods.
  • Keywords
    DC-DC power convertors; PWM power convertors; phase locked loops; switching convertors; transient response; PWM signal synchronization; adaptive PLL loop; adaptive on-time controlled multiphase DC-DC converters; adaptive on-time controlled switching converters; autotune control bandwidth; circuit complexity; circuit complexity reduction; current feedback; duty cycle jittering; duty cycle range; feedback design guideline; hybrid interleaving structure; model accuracy; phase lock loop method; pulse distribution method; ripple cancellation effect; small-signal model; stability problem; transient performance; transient response; Adaptation models; Clocks; Frequency modulation; Phase frequency detector; Phase locked loops; Pulse width modulation; Transient response;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Energy Conversion Congress and Exposition (ECCE), 2014 IEEE
  • Conference_Location
    Pittsburgh, PA
  • Type

    conf

  • DOI
    10.1109/ECCE.2014.6953961
  • Filename
    6953961