Title :
A 2.5-V BiCMOS comparator with current-mode interpolation
Author :
Boni, Andrea ; Morandi, Carlo ; Padoan, Silvia
Author_Institution :
Dipt. di Ingegeneria dell´´Inf., Parma Univ., Italy
fDate :
6/1/1999 12:00:00 AM
Abstract :
A high-speed latched comparator based on a current-mode architecture is presented. It achieves a sampling speed of 150 MS/s at 2.5 V supply, with a power consumption lower than conventional schemes. Its very low kickback noise makes it especially suitable for differential analog-to-digital converters (ADCs). Moreover, it supports precise 2X interpolation in current mode at full clock speed, allowing a further reduction of the ADC power consumption. The comparator was implemented in a 0.8 μm BiCMOS technology
Keywords :
BiCMOS integrated circuits; analogue-digital conversion; current comparators; current-mode circuits; high-speed integrated circuits; integrated circuit noise; interpolation; low-power electronics; 0.8 micron; 2.5 V; ADC power consumption reduction; BiCMOS comparator; analog/digital converters; current-mode architecture; current-mode interpolation; differential ADC; high-speed latched comparator; low kickback noise; BiCMOS integrated circuits; Circuit simulation; Clocks; Energy consumption; Helium; Interpolation; Local area networks; Low voltage; Power supplies; Sampling methods;
Journal_Title :
Solid-State Circuits, IEEE Journal of
