DocumentCode
1512704
Title
MOSFET´s negative transconductance at room temperature
Author
Versari, Roberto ; Riccò, Bruno
Author_Institution
Dept. of Electron., Bologna Univ., Italy
Volume
46
Issue
6
fYear
1999
fDate
6/1/1999 12:00:00 AM
Firstpage
1189
Lastpage
1195
Abstract
Negative transconductance is reported for the first time at T=300 K for NMOS transistors fabricated with different technologies and oxide thickness in the 3-20 nm range. The effects of drain bias, channel length, oxide thickness as well as substrate doping and bias on the phenomenon are investigated. The results are interpreted in terms of surface-roughness limited mobility, and parameters for mobility modeling at high effective fields are extracted
Keywords
MOSFET; carrier mobility; high field effects; semiconductor device models; 3 to 20 nm; 300 K; NMOS transistors; channel length; drain bias; high effective fields; mobility modeling; n-MOSFET; n-channel MOSFET; negative transconductance; oxide thickness; room temperature; substrate doping; surface-roughness limited mobility; Degradation; Doping; Electron mobility; MOSFET circuits; Rough surfaces; Scattering; Semiconductor process modeling; Surface roughness; Temperature distribution; Transconductance;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.766883
Filename
766883
Link To Document