Experimental study of hot-carrier effects in LDMOS transistors

Author

Versari, Roberto ; Pieracci, Augusto

Author_Institution

Dept. of Electron., Bologna Univ., Italy

Volume

46

Issue

6

fYear

1999

fDate

6/1/1999 12:00:00 AM

Firstpage

1228

Lastpage

1233

Abstract

Hot-carrier currents and the induced degradation mechanisms in lateral double-diffused MOS (LDMOS) transistors for smart power applications are investigated in detail. Three different regions within the device where significant hot-carrier generation can occur depending on bias as well as device technological parameters have been identified. Guidelines to suppress the degradation mechanisms involving the two lightly doped regions of the device not overlapped by the gate electrode, responsible for the stronger device degradation, are provided. Devices optimized according to the given guidelines have been fabricated and demonstrate a strong hot carrier resistance

Keywords

doping profiles; hot carriers; power MOSFET; power integrated circuits; semiconductor device reliability; LDMOS transistors; degradation mechanisms suppression; hot carrier resistance; hot-carrier currents; hot-carrier effects; hot-carrier generation; induced degradation mechanisms; lateral double-diffused MOS transistors; lightly doped regions; smart power applications; Costs; Degradation; Doping profiles; Electrodes; Guidelines; Helium; Hot carrier effects; Hot carriers; MOSFETs; Voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.766890

Filename

766890