DocumentCode :
1513536
Title :
Multiple-path ATM switch architecture for dynamic VC establishment
Author :
Sheu, T.L. ; Lin, G.J.
Author_Institution :
Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
Volume :
148
Issue :
3
fYear :
2001
fDate :
5/1/2001 12:00:00 AM
Firstpage :
119
Lastpage :
127
Abstract :
The paper presents a novel ATM switch architecture to support a multiple-path virtual channel (MPVC). Based on an internal cell loss threshold the switch can dynamically change its hardware structure from a single-path to a multiple-path VC. Two algorithms are developed to cope with the dynamic nature of switch architectures. The first, bandwidth allocation algorithm (BAA), is used to reserve bandwidth evenly for a call request that requires the support of a multiple-path VC. The second, cell resequencing algorithm (CRA), is applied to reorder the cell sequence at every extra switch stage, when a single-path VC is changed to a multiple-path VC. The paper analyses the MPVC architecture using both mathematical and simulation models. Then, it compares the performance of using a single-path VC and a multiple-path VC, respectively, in terms of end-to-end cell transfer delay, cell loss ratio, and effective VC throughput under different traffic loads and buffer sizes
Keywords :
asynchronous transfer mode; bandwidth allocation; bandwidth allocation algorithm; cell loss ratio; cell resequencing algorithm; cell sequence; dynamic VC establishment; end-to-end cell transfer delay; hardware structure; multiple-path ATM switch architecture; multiple-path virtual channel;
fLanguage :
English
Journal_Title :
Computers and Digital Techniques, IEE Proceedings -
Publisher :
iet
ISSN :
1350-2387
Type :
jour
DOI :
10.1049/ip-cdt:20010400
Filename :
936329
Link To Document :
بازگشت