A comparative investigation of various advanced bus clamped space vector pulse width modulation (SVPWM) techniques

There are many switching patterns that have been realized to implement space vector pulse width modulation (SVPWM) for three-phase drives. The flexibility in the placement of zero space vector imparts a generality for SVPWM techniques and results in either continuous or discontinuous PWM. This paper investigates all advanced Bus Clamping SVPWM techniques and compares the performance of the modulation strategies. The number of switching pulses are limited by the maximum switching frequency of semiconductor devices used in a PWM inverter. The line current distortion is considered as the principal performance index for evaluating various PWM techniques. An IGBT (Insulated Gate Bipolar Transistor) based 2 KVA voltage source inverter (VSI) with DC bus voltage of 400 V is designed and v/f control is implemented with an 8-bit PIC microcontroller (PIC18F452). The bus clamped SVPWM switching strategies are experimentally verified on a 415 V, 2 hp, 50 Hz, 3-phase induction motor. The experimental results and waveforms are presented for comparing different bus clamped SVPWM techniques. The comparative results reveals that the asymmetric zero changing (AZCS) SVPWM strategy produces less total harmonic distortion in comparison with other strategies for higher modulation indices.