A novel double ion-implant (DII) Ti-salicide technology for high-performance sub-0.25-μm CMOS devices applications

Author

Thei, Kong-Beng ; Liu, Wen-Chau ; Chuang, Hung-Ming ; Lin, Kun-Wei ; Cheng, Chin-Chuan ; Ho, Chin-Hsiung ; Su, Chi-Wen ; Wuu, Shou-Gwo ; Wang, Chung-Shu

Author_Institution

Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan

Volume

48

Issue

8

fYear

2001

fDate

8/1/2001 12:00:00 AM

Firstpage

1740

Lastpage

1742

Abstract

A novel double ion-implant Ti-salicide technology combining As pre-amorphization implant plus Si ion-mixing implant without the additional lithography process has been developed successfully and reported. Based on this technology, the good performances of uniform Ti-silicide formation, low and narrow distribution of sheet resistances both on n⁺/p⁺ poly-gate and source/drain diffusion layers, and lower leakage currents in the n⁺/p-well and p⁺/n-well junctions are obtained simultaneously. In addition, excellent behavior of a 0.24-μm NMOSFET and PMOSFET fabricated by this technology are also achieved

Keywords

CMOS integrated circuits; integrated circuit interconnections; ion beam mixing; ion implantation; leakage currents; rapid thermal annealing; NMOSFET; PMOSFET; RTA; Si; TiSi₂; arsenic preamorphization implant; double ion-implant Ti-salicide technology; high-performance CMOS devices; lower leakage currents; sheet resistances distribution; silicon ion-mixing implant; source/drain diffusion layers; uniform Ti-silicide formation; CMOS process; CMOS technology; Implants; Leakage current; Lithography; MOS devices; MOSFET circuits; Rapid thermal annealing; Silicides; Ultra large scale integration;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.936697

Filename

936697