A new method of threshold voltage extraction via MOSFET gate-to-substrate capacitance measurement

Author

Lau, M.M. ; Chiang, C.Y.T. ; Yeow, Y.T. ; Yao, Z.Q.

Author_Institution

Sch. of Comput. Sci. & Electr. Eng., Queensland Univ., Brisbane, Qld., Australia

Volume

48

Issue

8

fYear

2001

fDate

8/1/2001 12:00:00 AM

Firstpage

1742

Lastpage

1744

Abstract

A new method to extract MOSFET threshold voltage V_T by measurement of the gate-to-substrate capacitance C_gb of the transistor is presented. Unlike existing extraction methods based on I-V data, the measurement of C_gb does not require DC drain current to flow between drain nd source thus eliminating the effects of source and drain series resistance R_SD/ , and at the same time, retains a symmetrical potential profile across the channel. Experimental and simulation results on devices with different sizes are presented to justify the proposed method

Keywords

MOSFET; capacitance measurement; semiconductor device measurement; MEDICI simulation; MOSFET; depletion-inversion transition; gate-to-substrate capacitance measurement; symmetrical potential profile; threshold voltage extraction; zero drain current; CMOS technology; Capacitance measurement; Current measurement; Data mining; Electrical resistance measurement; Fabrication; MOSFET circuits; Silicides; Threshold voltage; Very large scale integration;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.936698

Filename

936698