DocumentCode
1514333
Title
Improved Methodology for Integrated
-Value Extractions
Author
Ciofi, Ivan ; Borrello, Gianpaolo ; Madia, Oreste ; Wilson, Christopher J. ; Vereecke, Bart ; Beyer, Gerald P.
Author_Institution
Imec, Leuven, Belgium
Volume
59
Issue
6
fYear
2012
fDate
6/1/2012 12:00:00 AM
Firstpage
1607
Lastpage
1613
Abstract
We present an improved methodology for integrated k-value extractions that is based on the use of interconnect schemes with deep hanging low-k trenches and reduced passivation as a test vehicle. We perform a rigorous analysis for the calculation of the error bar and the evaluation of the impact of each source of uncertainty. We demonstrate the effectiveness of our methodology in reducing the error bar on the extracted integrated k-value at 90 nm half-pitch and discuss the limitations at narrow pitches.
Keywords
error analysis; integrated circuit interconnections; low-k dielectric thin films; passivation; error bar; integrated k-value extractions; interconnect schemes; low-k trenches; narrow pitches; reduced passivation; uncertainty; Accuracy; Capacitance; Capacitance measurement; Dielectrics; Electrical resistance measurement; Materials; Uncertainty; $k$ -value; Damascene integration; dielectric constant; low- $k$ dielectric materials;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2012.2196436
Filename
6198323
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