• DocumentCode
    1514337
  • Title

    IC-compatible two-level bulk micromachining process module for RF silicon technology

  • Author

    Pham, Nga Phuong ; Sarro, Pasqualina M. ; Ng, Kiat T. ; Burghartz, Joachim N.

  • Author_Institution
    Lab. of Electron. Components, Technol. & Mater., Delft Univ. of Technol., Netherlands
  • Volume
    48
  • Issue
    8
  • fYear
    2001
  • fDate
    8/1/2001 12:00:00 AM
  • Firstpage
    1756
  • Lastpage
    1764
  • Abstract
    This paper presents a novel two-level silicon bulk micromachining for integration of RF devices. The RF devices are fabricated at the frontside of Si(100) wafers using conventional IC technology. A post-processing module is applied from the wafer backside with precise alignment to the frontside. This module can provide a blanket ground plane at an optimum position beneath the wafer surface, a frontside contact from the wafer surface to that ground plane, and trenches to suppress crosstalk through the conductive silicon by adding two mask levels. An extension to four masks allows for an integration of large passive components beneath circuitry for a much reduced chip area, lowering chip size and cost. The feasibility of the novel post-process module is demonstrated through the fabrication of microstrip transmission lines, conductor-backed spiral inductors, trench-barriers against crosstalk through the conductive silicon substrate, and high-quality subsurface spiral inductors
  • Keywords
    hybrid integrated circuits; inductors; integrated circuit metallisation; micromachining; microstrip circuits; microwave integrated circuits; photolithography; sputter etching; transceivers; 3D integration; IC-compatible; RF silicon technology; RF transceiver; Si; blanket ground plane; conductive silicon substrate; conductor-backed spiral inductors; crosstalk suppression trenches; four mask extension; frontside contact; high-quality subsurface spiral inductors; metallisation; microstrip transmission lines; optimum position; plasma etching; postprocessing module; precise alignment; reduced chip area; trench-barriers; two mask levels; two-level bulk micromachining process module; wafer backside; Costs; Crosstalk; Fabrication; Inductors; Micromachining; Microstrip; Radio frequency; Radiofrequency integrated circuits; Silicon; Spirals;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.936704
  • Filename
    936704