Abstract :
This book addresses the problems associated with circuit fault and signal processing testing, with particular emphasis on small delay defects (SDDs). SDDs are those of magnitude small enough that they cause failures only if on long paths. They are of interest because many test generation methods find relatively short paths on which to propagate the effects of delay faults. This means some SDDs may not be detected, which can lead to failures when the design is operating at full speed and the long paths are sensitized. The reader should be aware that this book is not a tutorial on SDDs, but rather a collection of new testing methods, which build in each chapter. However,the book does not describe a way of generating patterns to detect SDDs, but rather is an example of a new trend in testing, the development of methods to select patterns from a larger set. The precursor of this method is the use of fault simulation to determine which of a large number of randomly generated scan patterns detect faults, which are then used as a prelude to traditional test generation.
