DocumentCode
1515124
Title
A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs
Author
Osaki, Yuji ; Hirose, Tetsuya ; Kuroki, Nobutaka ; Numa, Masahiro
Author_Institution
Dept. of Electr. & Electron. Eng., Kobe Univ., Kobe, Japan
Volume
47
Issue
7
fYear
2012
fDate
7/1/2012 12:00:00 AM
Firstpage
1776
Lastpage
1783
Abstract
This paper presents a level shifter circuit capable of handling extremely low-voltage inputs. The circuit has a distinctive current generation scheme using a logic error correction circuit that works by detecting the input and output logic levels. The proposed level shifter circuit can convert low-voltage digital input signals into high-voltage digital output signals. The circuit achieves low-power operation because it dissipates operating current only when the input signal changes. Measurement results demonstrated that the circuit can convert a 0.23-V input signal into a 3-V output signal. The power dissipation was 58 nW for a 0.4-V 10-kHz input pulse.
Keywords
CMOS digital integrated circuits; error correction; large scale integration; low-power electronics; distinctive current generation scheme; extremely low-voltage digital CMOS LSI; frequency 10 kHz; high-voltage digital output signals; input logic levels; logic error correction circuit; low-power level shifter; low-voltage digital input signals; output logic levels; power 58 nW; voltage 0.23 V; voltage 0.4 V; voltage 3 V; Delay; Digital circuits; Error correction; MOSFETs; Noise; Power dissipation; Level converter; level shifter; low power; low voltage; subthreshold;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2012.2191320
Filename
6198744
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