DocumentCode
1515205
Title
A High-Speed Deep-Trench MOSFET With a Self-Biased Split Gate
Author
Jiang, Qimeng ; Wang, Minzhi ; Chen, Xingbi
Author_Institution
State Key Lab. of Electron. Thin Films & Integrated Devices, Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Volume
57
Issue
8
fYear
2010
Firstpage
1972
Lastpage
1977
Abstract
A split-gate deep-trench MOSFET (DT-MOS) with its split gate self-biased to an integrated low voltage supply is proposed. Due to the split gate being biased to an approximately constant voltage, this structure has a smaller amount of gate-to-drain charge Qgd without increase in the specific on-resistance Ron, compared with the conventional DT-MOS. Numerical simulation results show that the figure of merit (FOM = Qgd ·Ron) is largely reduced, compared with that of the conventional DT-MOS.
Keywords
MOSFET; figure of merit; gate-to-drain charge; high-speed deep-trench MOSFET; integrated low voltage supply; numerical simulation; self-biased split gate; Capacitance; Low voltage; MOSFET circuits; Numerical simulation; Region 7; Shape; Split gate flash memory cells; Thickness control; Thin film devices; Deep-trench MOSFET (DTMOS); figure of merit (FOM); gate charge; self-biased split gate; specific on-resistance;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2010.2051247
Filename
5484426
Link To Document