Title :
An accurate model for power DMOSFETs including interelectrode capacitances
Author :
Scott, Robert S. ; Franz, Gerhard A. ; Johnson, Jennifer L.
Author_Institution :
General Electric Res. & Dev., Schenectady, NY, USA
fDate :
4/1/1991 12:00:00 AM
Abstract :
A SPICE-compatible circuit model for power MOSFETs is presented. It is based on device physics and uses a subcircuit representation. The interelectrode capacitances are modeled accurately as nonlinear functions of the applied biases. Various second-order effects relating to the gate capacitance model are discussed, and strategies are presented to include them in the model. The model parameters can be obtained from device measurements. The model is verified by comparing measured and simulated waveforms from a gate charge test circuit
Keywords :
capacitance; digital simulation; electrodes; electronic engineering computing; insulated gate field effect transistors; power transistors; semiconductor device models; SPICE-compatible; applied biases; gate capacitance; interelectrode capacitances; power DMOSFET; semiconductor device modelling; subcircuit representation; Capacitance; Circuit simulation; Circuit synthesis; Circuit testing; Costs; MOS devices; MOSFET circuits; Power system modeling; SPICE; Voltage;
Journal_Title :
Power Electronics, IEEE Transactions on
