Wideband scalable electrical model for microwave/millimeter wave flip chip interconnects

We present a method for developing fully scalable lumped element models for flip chip interconnects. Measurements of test structures and full wave simulations are used to generate circuit models for various single bump configurations. Furthermore, regression models are developed for scaling the values of the elements with the physical attributes of the circuit. First, the method is validated using only two factors, then the model is extended to more inputs related to the bump geometry and placement. The values of L and C in a simple π model have been scaled with the conductor overlap, the distance from the ground bump to the edge of the ground plane, the width of the CPW launch, the bump height and diameter. Explicit formulas are obtained for L and C as a function of those variables. It has been found that the value of the inductance varies with the conductor overlap, bump height and diameter, while the capacitance is mostly affected by conductor overlap. This paper presents the first fully scalable model for microwave flip chip technology