Error-compensated analog cells for vector multiplication and vector quantization

The size, simplicity, and interconnectability of the computing cells are key factors to achieving high-density highly parallel systems (e.g., neural networks, data compressors). In this brief, we associate a compact four-quadrant complementary metal-oxide-semiconductor multiplier to an analog storage media to achieve a symmetric balanced cell, proper for the construction of highly linear parallel vector-matrix multiplier circuits. Subsequently, with minor modifications, we extend the use of such cell to the construction of a complete vector quantizer system. Both cells operate in voltage mode at the input, allowing easy interfacing, and in current mode at the output, thus permitting direct parallelism. The cell symmetry and signal balance cause strong cancellation of second-order effects and circuit nonidealities, as well as prevent charge injection, resulting in very linear systems. Experimental results and simulations illustrate the main features of the proposed implementations