Title :
A Processor Power Management Scheme for Handheld Systems Considering Off-Chip Contributions
Author :
Choi, Jinuk ; Cha, Hojung
Author_Institution :
Applic. Design Center, Intel Corp., Seoul, South Korea
Abstract :
Processor power management in handheld devices is the primary technique for exploiting power reduction while ensuring performance. Modern mobile devices require high performance at the system level to decode high-bitrate multimedia. For this reason, processor offloading using off-chip controllers is commonly exercised in this field. However, current power management techniques do not fully consider the offloading architecture. We propose a scheme to achieve power reduction through an empirical method, which detects and classifies off-chip usages, in addition to combining dynamic voltage scaling (DVS) with dynamic power management (DPM). We experimented with the proposed technique in a real hardware environment and achieved up to a 37% power reduction compared with previous schemes.
Keywords :
microprocessor chips; multimedia communication; DVS; dynamic power management; dynamic voltage scaling; handheld device; high-bitrate multimedia; mobile device; off-chip controller; power reduction; processor power management scheme; Dynamic power management (DPM); dynamic voltage scaling (DVS); handheld devices; offloading; processor power management;
Journal_Title :
Industrial Informatics, IEEE Transactions on
DOI :
10.1109/TII.2010.2050330