DocumentCode :
151649
Title :
Faulty stochastic LDPC decoders over the binary symmetric channel
Author :
Kameni Ngassa, Christiane L. ; Savin, Valentin ; Declercq, David
Author_Institution :
LETI, CEA, Grenoble, France
fYear :
2014
fDate :
18-22 Aug. 2014
Firstpage :
112
Lastpage :
116
Abstract :
The analysis of error correction decoders running on faulty hardware has attracted an increasing interest in recent years, due to the inherent unreliability of emerging nanodevices. In this paper we investigate the performance of the stochastic decoder running on faulty hardware. To this end, we first introduce two error models to describe the noisy components of the decoder. We then provide a finite-length statistical analysis for each error model and, based on the obtained performance, we conclude that stochastic decoders have an inherent fault tolerant capability.
Keywords :
binary codes; decoding; error correction codes; fault tolerance; parity check codes; statistical analysis; binary symmetric channel; error correction decoders; fault tolerant capability; faulty stochastic LDPC decoders; finite-length statistical analysis; noisy components; Decoding; Error probability; Hardware; Iterative decoding; Noise; Noise measurement; Stochastic processes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Turbo Codes and Iterative Information Processing (ISTC), 2014 8th International Symposium on
Conference_Location :
Bremen
Type :
conf
DOI :
10.1109/ISTC.2014.6955096
Filename :
6955096
Link To Document :
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