DocumentCode
1517558
Title
Chip-delay locked matched filter for DS-CDMA systems using long sequence spreading
Author
Yoon, Young C. ; Leib, Harry
Volume
49
Issue
8
fYear
2001
fDate
8/1/2001 12:00:00 AM
Firstpage
1468
Lastpage
1478
Abstract
This paper considers an improved single-user detection technique for asynchronous direct-sequence code-division multiple-access (DS-CDMA) systems using long sequence spreading (random-CDMA) Most of the known detection schemes for DS-CDMA suffer from either poor performance under power-imbalance (near-far like) conditions, excessive complexity, or incompatibility with systems employing long sequence spreading. To address these problems, this paper considers a signal-to-noise ratio maximizing linear time-invariant filter for one-shot bit symbol detection exploiting some information about the interferers. This filter, referred to as the chip-delay locked matched filter (CLMF), exploits the cyclostationarity in multiple-access interference, and it can offer good near-far resistance while remaining suitable for systems with long sequence spreading. The CLMF requires knowledge of interferers chip delays and signal powers; however, knowledge of their pseudonoise sequences is unnecessary. This paper also demonstrates the improvement in performances offered by the CLMF over other single-user receivers such as the conventional matched filter and noise-whitening matched filter performance is evaluated in terms of probability of outage for single-rate and dual-rate DS-CDMA systems using bandwidth-efficient chip pulses, over a single-path additive white Gaussian noise channel. Errors in the interferer chip delay estimates degrade the CLMF performance. However, if the root-mean-square value of these errors is less than 5% of the chip interval, then this degradation is small
Keywords
AWGN channels; code division multiple access; matched filters; multiuser channels; receivers; spread spectrum communication; CLMF; DS-CDMA systems; asynchronous direct-sequence code-division multiple-access; bandwidth-efficient chip pulses; chip-delay locked matched filter; complexity; cyclostationarity; dual-rate DS-CDMA systems; long sequence spreading; multiple-access interference; near-far resistance; one-shot bit symbol detection; outage; performance; power-imbalance conditions; random-CDMA; signal-to-noise ratio maximizing linear time-invariant filter; single-path additive white Gaussian noise channel; single-rate DS-CDMA systems; single-user detection technique; Additive white noise; Degradation; Delay estimation; Information filtering; Information filters; Matched filters; Multiaccess communication; Multiple access interference; Nonlinear filters; Signal to noise ratio;
fLanguage
English
Journal_Title
Communications, IEEE Transactions on
Publisher
ieee
ISSN
0090-6778
Type
jour
DOI
10.1109/26.939895
Filename
939895
Link To Document