• DocumentCode
    1518002
  • Title

    Adaptive Fault-Tolerant Architecture for Unreliable Technologies With Heterogeneous Variability

  • Author

    Aymerich, Nivard ; Cotofana, Sorin D. ; Rubio, Antonio

  • Author_Institution
    Dept. of Electron. Eng., High-Performance IC Design Group, Univ. Politec. de Catalunya, Barcelona, Spain
  • Volume
    11
  • Issue
    4
  • fYear
    2012
  • fDate
    7/1/2012 12:00:00 AM
  • Firstpage
    818
  • Lastpage
    829
  • Abstract
    This paper introduces an efficient adaptive redundant architecture, which makes use of the averaging cell (AVG) principle in order to improve the reliability of nanoscale circuits and systems. We propose an adaptive structure that is able to cope with nonhomogeneous variability and time-varying effects like degradation and external aggressions, which are expected to be key limiting factors in future technologies. First, we consider static heterogeneity of the input variability levels and derive a methodology to determine the weight values that maximize the reliability of the averaging system. The implementation of these optimal weights in the AVG gives place to the unbalanced AVG structure (U-AVG). Second, we take into consideration that circuits are exposed to time-dependent aggression factors, which can induce significant changes on the levels of variability, and introduce the adaptive AVG structure (AD-AVG). It embeds a learning mechanism based on a variability monitor that allows for the on-line input weight adaptation such that the actual weight configuration properly reflects the aging status. To evaluate the potential implications of our proposal, we compare the conventional AVG architecture with the unbalanced (U-AVG) and the adaptive (AD-AVG) approaches in terms of reliability and redundancy overhead by means of Monte Carlo simulations. Our results indicate that when AVG and U-AVG are exposed to the same static heterogeneous variability, U-AVG requires 4 less redundancy for the same reliability target. Subsequently, we include temporal variation of input drifts in the simulations to reproduce the effects of aging and external aggressions and compare the AVG structures. Our experiments suggest that AD-AVG always provides the maximum reliability and the highest tolerance against degradation. We also analyze the impact of nonideal variability monitor on the effectiveness of the AD-AVG behavior. Finally, specific reconfigurable hardware based on resistive swit- hing crossbar structures is proposed for the implementation of AD-AVG.
  • Keywords
    Monte Carlo methods; circuit reliability; fault tolerance; integrated circuit reliability; nanoelectronics; switching circuits; Monte Carlo simulation; adaptive AVG structure; adaptive fault tolerant architecture; averaging cell principle; averaging system; external aggressions; heterogeneous variability; learning mechanism; nanoscale circuit reliability; nonhomogeneous variability; optimal weights; redundancy overhead; resistive switching crossbar structure; time-varying effects; unreliable technology; variability monitor; Computer architecture; Error probability; Mathematical model; Microprocessors; Optimized production technology; Redundancy; Averaging cell (AVG); degradation; fault tolerance; hardware redundancy; nanoscale technology; reliability;
  • fLanguage
    English
  • Journal_Title
    Nanotechnology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1536-125X
  • Type

    jour

  • DOI
    10.1109/TNANO.2012.2199513
  • Filename
    6200874