Title :
Reduction of Variation-Induced Energy Overhead in Multi-Core Processors
Author :
Drego, Nigel ; Chandrakasan, Anantha ; Boning, Duane ; Shah, Devavrat
Author_Institution :
PDF Solutions, San Jose, CA, USA
fDate :
6/1/2011 12:00:00 AM
Abstract :
Core-to-core variability in future many-core chip multi-processors (CMPs) negatively impacts energy. Under-performing cores necessitate increasing the system voltage to maintain homogeneous core performance, introducing an energy overhead. Multiple supply voltages can be used to mitigate the impact of delay variation in CMPs. In this paper, we carefully analyze the use of a local search algorithm to pick near-optimal supply voltages while meeting a fixed performance target. With two system voltages, we prove our algorithm selects the global optimum and in the more general multiple voltage case we develop quantitative bounds. Using a custom simulation methodology on a real processor core, we show that two system voltages provide the most incremental benefit, reducing the energy overhead relative to a single voltage by 59-75% and total energy by 6-16%. Additionally, the worst 5-15% of cores in such systems necessitate increasingly larger amounts of incremental energy for a constant incremental performance gain. Therefore, turning off or disabling these cores is beneficial to a joint performance-energy metric.
Keywords :
microprocessor chips; search problems; constant incremental performance gain; core-to-core variability; custom simulation methodology; delay variation mitigation; general multiple voltage; incremental energy; local search algorithm; many-core chip multiprocessors; near-optimal supply voltages; variation-induced energy overhead reduction; Approximation methods; Joints; Leakage current; Logic gates; Measurement; Multicore processing; Software; Delay measurement; digital circuits; spatial correlation; variation;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2010.2102431