DocumentCode
1518654
Title
A Distributed Bulk-Oxide Trap Model for 
InGaAs MOS Devices
Author
Yuan, Yu ; Yu, Bo ; Ahn, Jaesoo ; McIntyre, Paul C. ; Asbeck, Peter M. ; Rodwell, Mark J.W. ; Taur, Yuan
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of California at San Diego, La Jolla, CA, USA
Volume
59
Issue
8
fYear
2012
Firstpage
2100
Lastpage
2106
Abstract
This paper presents a distributed circuit model for bulk-oxide traps based on tunneling between the semiconductor surface and trap states in the gate dielectric film. The model is analytically solved at dc. It is shown that the distributed bulk-oxide trap model correctly depicts the frequency dispersion in the capacitance- and conductance-voltage data of Al2O3-InGaAs MOS devices that do not fit the conventional interface state model. The slope degradation or stretch-out of the measured capacitance-voltage curve near flatband can be also explained by the distributed bulk-oxide trap model.
Keywords
III-V semiconductors; MOSFET; tunnelling; Al2O3-InGaAs; MOS device; capacitance-voltage curve; capacitance-voltage data; conductance-voltage data; distributed bulk oxide trap model; distributed circuit model; flatband; frequency dispersion; gate dielectric film; interface state model; semiconductor surface; slope degradation; trap states; tunneling; Aluminum oxide; Capacitance; Dispersion; Electron traps; Interface states; Logic gates; Semiconductor device modeling; Bulk-oxide trap; III–V; MOS; tunneling;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2012.2197000
Filename
6202333
Link To Document