An FET-level linearization method using a predistortion branch FET

Author

Kim, Min-Gun ; Kim, Chung-Hwan ; Yu, Hyun-Kyu ; Lee, Jaejin

Author_Institution

Compound Semicond. Dept., Electron. & Telecommun. Res. Inst., Daejeon, South Korea

Volume

9

Issue

6

fYear

1999

fDate

6/1/1999 12:00:00 AM

Firstpage

233

Lastpage

235

Abstract

To reduce third-order intermodulation distortion (IMD3), a linearization circuit using a predistortion branch field-effect transistor (FET) was proposed and its performance was verified for a hybrid circuit. The method is based on the fact that IMD3 generated from main FET is nulled by that from a branch FET with optimized bias condition. For two-tone frequencies 900 and 904 MHz, the performance of the circuit showed up to 13.9 dB improvement in the output third-order intermodulation intercept point (OIP3) at its peak point and more than 6.3 dB for 0.2 V range of branch FETs gate-source bias. For its simple topology and improvement in OIP3, the method merits use in monolithic microwave integrated circuit (MMIC) amplifiers for low-to-medium power applications

Keywords

MMIC amplifiers; intermodulation distortion; linearisation techniques; FET-level linearization method; IMD3; MMIC amplifiers; hybrid circuit; intermodulation distortion; intermodulation intercept point; linearization circuit; monolithic microwave integrated circuit; optimized bias condition; predistortion branch FET; third-order IMD reduction; Application specific integrated circuits; Circuit topology; FETs; Frequency; Intermodulation distortion; MMICs; Microwave integrated circuits; Microwave theory and techniques; Optimization methods; Predistortion;

fLanguage

English

Journal_Title

Microwave and Guided Wave Letters, IEEE

Publisher

ieee

ISSN

1051-8207

Type

jour

DOI

10.1109/75.769531

Filename

769531