DocumentCode :
1520504
Title :
Programmable processor for on-line computing of inverse Haar transform
Author :
Martín, O. ; Solana, J.M.
Author_Institution :
Dept. de Electron. y Comput., Cantabria Univ., Santander, Spain
Volume :
37
Issue :
16
fYear :
2001
fDate :
8/2/2001 12:00:00 AM
Firstpage :
1050
Lastpage :
1052
Abstract :
A processor for the one-dimensional inverse Haar transform (1D-IFHT) programmable for N=8 up to N=1024, with low latency data flow is presented. It enables on-line computing of both the normalised and the non-normalised IFHT to be performed, with very low nrmse
Keywords :
Haar transforms; digital signal processing chips; field programmable gate arrays; image coding; image encoding; low latency data flow; nonnormalised IFHT; normalised IFHT; one-dimensional inverse Haar transform; online computing; programmable processor; single configurable FPGA chip;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:20010704
Filename :
941827
Link To Document :
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