DocumentCode :
1521147
Title :
HiperLAN 5.4-GHz low-power CMOS synchronous oscillator
Author :
Deval, Yann ; Bégueret, Jean-Baptiste ; Spataro, Anne ; Fouillat, Pascal ; Belot, Didier ; Badets, Franck
Author_Institution :
IXL, Bordeaux I Univ., France
Volume :
49
Issue :
9
fYear :
2001
fDate :
9/1/2001 12:00:00 AM
Firstpage :
1525
Lastpage :
1530
Abstract :
A 5.4-GHz 0.25-μm very-large-scale-integration CMOS synchronous oscillator (SO) is proposed in this paper, which is designed to act as a local oscillator for HiperLAN systems. The advantage of using such an oscillator in a double-loop frequency synthesizer is demonstrated. The design strategy leading to an optimized SO with regards to its synchronization range is described. A test chip is presented, which provides a 150-MHz synchronization range and a -97-dBc/Hz phase noise at 10-kHz offset from the 5-GHz carrier, while consuming only 5 mA from a 2.5-V supply
Keywords :
CMOS analogue integrated circuits; VLSI; frequency synthesizers; low-power electronics; phase noise; radiofrequency oscillators; synchronisation; wireless LAN; 0.25 micron; 2.5 V; 5 mA; 5.4 GHz; CMOS synchronous oscillator; HiperLAN system; double-loop frequency synthesizer; local oscillator; low-power VLSI design; phase noise; synchronization range; Bandwidth; CMOS technology; Circuits; Design optimization; Energy consumption; Frequency conversion; Frequency synthesizers; Local oscillators; Phase locked loops; Very large scale integration;
fLanguage :
English
Journal_Title :
Microwave Theory and Techniques, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9480
Type :
jour
DOI :
10.1109/22.942562
Filename :
942562
Link To Document :
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