Title :
Analog rank extractors
Author_Institution :
Center for Integrated Syst., Stanford Univ., CA, USA
fDate :
12/1/1997 12:00:00 AM
Abstract :
This paper focuses on continuous-time analog rank extractors, with an emphasis on MOS circuits. Sources of errors in previous analog implementations are analyzed, and an improved multiple-input min/max circuit configuration is proposed. A generalized analog rank extractor is discussed as well as its limitations on the number of inputs and rank. In a sorting network approach, the presorting and path combination techniques are used to reduce the rank selector implementation
Keywords :
MOS analogue integrated circuits; analogue processing circuits; continuous time systems; median filters; minimax techniques; sorting; MOS circuit; continuous-time analog rank extractor; error analysis; multiple-input min/max circuit; path combination; presorting; rank selector; sorting network; CMOS analog integrated circuits; Data acquisition; Data processing; Filters; Nonlinear circuits; Signal processing; Sorting; Speech processing; Threshold voltage; Transconductance;
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
