An 18-GHz continuous-time Σ-Δ analog-digital converter implemented in InP-transferred substrate HBT technology

Author

Jaganathan, Shrinivasan ; Krishnan, Sundararajan ; Mensa, Dino ; Mathew, Thomas ; Betser, Yoram ; Wei, Yun ; Scott, Dennis ; Urteaga, Miguel ; Rodwell, Mark

Author_Institution

Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA

Volume

36

Issue

9

fYear

2001

fDate

9/1/2001 12:00:00 AM

Firstpage

1343

Lastpage

1350

Abstract

We report an 18-GHz clock-rate second-order continuous-time Σ-Δ analog-digital converter (ADC) implemented using InP-transferred substrate HBTs. Under two-tone test conditions, the ADC achieved 43 dB and 33 dB SNR at signal frequencies of 500 MHz and 990 MHz, respectively. The IC occupied 1.95 mm² die area and dissipated ~1.5 W

Keywords

III-V semiconductors; bipolar integrated circuits; delta-sigma modulation; high-speed integrated circuits; indium compounds; integrated circuit testing; 1.5 W; 18 GHz; 500 MHz; 990 MHz; InP; continuous-time Σ-Δ analog-digital converter; die area; second-order analog-digital converter; signal frequencies; transferred substrate HBT technology; two-tone test conditions; Analog-digital conversion; Clocks; Computer architecture; Filters; Frequency; Heterojunction bipolar transistors; Indium gallium arsenide; Sampling methods; Signal resolution; Signal to noise ratio;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.944661

Filename

944661