A new low-noise FET structure

Author

Truitt, G. Austin ; Heston, David D. ; Klein, James L.

Author_Institution

Texas Instruments Inc., Dallas, TX, USA

Volume

38

Issue

12

fYear

1990

fDate

12/1/1990 12:00:00 AM

Firstpage

1944

Lastpage

1948

Abstract

A novel monolithic FET topology has demonstrated improved minimum noise figure when compared with a conventional pi-gate FET. The structure, referred to as the spider FET, has allowed noise figures to be achieved in monolithic LNA applications that are 0.3 dB lower than in the standard 0.5-μm GaAs MESFET ion-implantation process. The improved spider FET performance is achieved by reducing the gate feed resistance and minimizing the parasitic gate-to-source capacitance in the region of the gate feed. The spider FET shows promise in 0.25-μm MESFET and HEMT (high electron mobility transistor) applications, as well as in power FET applications

Keywords

MMIC; Schottky gate field effect transistors; electron device noise; field effect integrated circuits; field effect transistors; high electron mobility transistors; power transistors; solid-state microwave devices; 0.25 micron; HEMT; MESFET; gate feed resistance; high electron mobility transistor; low-noise FET structure; minimum noise figure; monolithic FET topology; monolithic LNA applications; parasitic gate-to-source capacitance; power FET applications; spider FET; submicron device; FETs; Feeds; Gallium arsenide; Geometry; Helium; MESFETs; Noise figure; Solid modeling; Topology; Transconductance;

fLanguage

English

Journal_Title

Microwave Theory and Techniques, IEEE Transactions on

Publisher

ieee

ISSN

0018-9480

Type

jour

DOI

10.1109/22.64578

Filename

64578