DocumentCode :
1524187
Title :
Physical and predictive models of ultrathin oxide reliability in CMOS devices and circuits
Author :
Stathis, James H.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Volume :
1
Issue :
1
fYear :
2001
fDate :
3/1/2001 12:00:00 AM
Firstpage :
43
Lastpage :
59
Abstract :
The microelectronics industry owes its considerable success largely to the existence of the thermal oxide of silicon. However, recently there is concern that the reliability of ultra-thin dielectrics will limit further scaling to slightly thinner than 2 mm. This paper will review the physics and statistics of dielectric wearout and breakdown in ultrathin SiO2-based gate dielectrics. Electrons or holes tunneling through the gate oxide generate defects until a critical density is reached and the oxide breaks down. The critical defect density is explained by the formation of a percolation path of defects across the oxide. Only <1% of these paths ultimately lead to destructive breakdown, and the microscopic nature of these defects is not known. The rate of defect generation decreases approximately exponentially with supply voltage, below a threshold voltage of about 5 V for hot electron-induced hydrogen release. However, the tunnel current also increases exponentially with decreasing oxide thickness, leading to a decreasing time-to-breakdown and a diminishing margin for reliability as device dimensions are scaled. Estimating the reliability of the dielectric requires an extrapolation from the measurement conditions (e.g., higher voltage) to operation conditions. Because of the diminished reliability margin. it has become imperative to try to reduce the error in this extrapolation, Long-term (>1 year) stress experiments are now being used to measure the wearout and breakdown of ultrathin (<2 nm) dielectric films as close as possible to operating conditions. These measurements have revealed the details of the voltage dependence of the defect generation rate and critical defect density, allowing better modeling of the voltage dependence of the time-to-breakdown, Such measurements are used to guide the technology development prior to the manufacturing stage. We then discuss the nature of the electrical conduction through a breakdown spot and the effect of the oxide breakdown on device and circuit performance. In some cases, an oxide breakdown does not lead to immediate circuit failure, so more research is needed in order to develop a quantitative methodology for predicting the reliability of circuits
Keywords :
CMOS integrated circuits; failure analysis; hot carriers; integrated circuit modelling; integrated circuit reliability; percolation; semiconductor device breakdown; tunnelling; 1 yr; 2 nm; 5 V; CMOS devices; SiO2; breakdown spot; circuit failure; critical defect density; defect generation rate; dielectric breakdown; dielectric wearout; hot electron-induced hydrogen release; long-term stress experiments; operating conditions; percolation path; physical models; predictive models; threshold voltage; time-to-breakdown; tunnel current; ultrathin oxide reliability; voltage dependence; Circuits; Density measurement; Dielectric breakdown; Dielectric measurements; Electric breakdown; Extrapolation; Lead compounds; Microelectronics; Predictive models; Threshold voltage;
fLanguage :
English
Journal_Title :
Device and Materials Reliability, IEEE Transactions on
Publisher :
ieee
ISSN :
1530-4388
Type :
jour
DOI :
10.1109/7298.946459
Filename :
946459
Link To Document :
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