DocumentCode :
1524855
Title :
Creating 3D circuits using transferred films
Author :
Sailer, Philip M. ; Singhal, Piyush ; Hopwood, Jeffrey ; Kaeli, David R. ; Zavracky, Paul M. ; Warner, Keith ; Vu, D.P.
Author_Institution :
Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA
Volume :
13
Issue :
6
fYear :
1997
fDate :
11/1/1997 12:00:00 AM
Firstpage :
27
Lastpage :
30
Abstract :
During the past several years we have been developing technology for the creation of 3D microelectronics. Our 3D circuits are fabricated using standard bulk CMOS processing and are then transferred from one wafer to another. The transfer process allows alignment of the layers. The resulting structure consists of lower substrate and associated circuitry, with one or more thin-film circuit layers stacked on top, separated by bonding layers. We have developed an interconnection technology that allows layers to be electrically connected to one another. These interconnections are small and can be placed anywhere on the die. This unrestricted placement of interconnections gives our technology a unique advantage over other existing 3D interconnect techniques. We report our approach in this article
Keywords :
CMOS integrated circuits; integrated circuit interconnections; integrated circuit technology; 3D circuit fabrication; CMOS microelectronics; bonding layer; interconnection technology; transferred film; CMOS process; CMOS technology; Contact resistance; Filling; Ink; Integrated circuit interconnections; Plasma measurements; Silicon on insulator technology; Sputter etching; Wafer bonding;
fLanguage :
English
Journal_Title :
Circuits and Devices Magazine, IEEE
Publisher :
ieee
ISSN :
8755-3996
Type :
jour
DOI :
10.1109/101.646556
Filename :
646556
Link To Document :
بازگشت