A multibit ΣΔ modulator in floating-body SOS/SOI CMOS for extreme radiation environments

This paper presents the design of an experimental first-order ΣΔ modulator with 4-bit internal quantization, fabricated in a 1.5-μm space-qualified radiation-hard partially depleted silicon-on-sapphire (SOS) digital CMOS process. This converter architecture has been chosen partly to allow investigation into the design of a range of common analog functions with two key issues in mind: one of technology and one environmental. First, both the architecture and the circuit design are optimized using a variety of unconventional techniques to account for the influence of extreme bias-dependent, radiation-induced threshold-voltage shifts of up to 1 V, as well as poor 1/f device noise. Second, the circuitry is specially adapted to accommodate the floating-body behavior of this type of process, wherein drain conductance varies considerably with drain bias and frequency. The design techniques are directly applicable to very large-scale-integration silicon-on-insulator (SOI) design, where similar device physics are encountered. Notwithstanding the severe constraints on the design, the fabricated circuit provides 9.7 bits of dynamic range in a 63-kHz signal bandwidth, only degrading to 9.1 bits after 23 Mrad(Si) of total dose γ radiation