DocumentCode
1525387
Title
Effects of flash EEPROM floating gate morphology on electrical behavior of fast programming bits
Author
Nkansah, F.D. ; Hatalis, M.
Author_Institution
Motorola Inc., Austin, TX, USA
Volume
46
Issue
7
fYear
1999
fDate
7/1/1999 12:00:00 AM
Firstpage
1355
Lastpage
1362
Abstract
The effects of Flash EEPROM Floating Gate morphology on the generation and density of fast programming bits on a 2-MBit Flash EEPROM array has been characterized. These fast programming bits exhibit identical subthreshold characteristics similar to that of a normal bit after UV-erase, thus establishing that the initial charge stored on the floating gate of both fast and normal bit is the same. This clearly indicates that the fast programming phenomena result from an interaction of the programming process and the floating gate. An in depth experimentation reveals that the floating gate poly deposition and doping process are crucial for controlling the desired Fowler-Nordheim (FN) tunneling. A correlation is established between the fast bit density observed in the 2-MBit array, the FN tunneling currents, the floating gate deposition and doping processes. The fast programming bit threshold voltage distribution and density can be modulated with the floating gate deposition and doping processes
Keywords
flash memories; tunnelling; 2 Mbit; Fowler-Nordheim tunneling; UV erasure; doping; fast programming bit; flash EEPROM array; floating gate morphology; polysilicon deposition; subthreshold characteristics; threshold voltage; Character generation; Doping; EPROM; Electron traps; Helium; Modulation coding; Morphology; Nonvolatile memory; Threshold voltage; Tunneling;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.772476
Filename
772476
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