Title :
A selective-epitaxial-growth SiGe-base HBT with SMI electrodes featuring 9.3-ps ECL-gate delay
Author :
Washio, Katsuyoshi ; Ohue, Eiji ; Oda, Katsuya ; Tanabe, Masamichi ; Shimamoto, Hiromi ; Onai, Takahiro ; Kondo, Masao
Author_Institution :
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
fDate :
7/1/1999 12:00:00 AM
Abstract :
An ultra-high-speed selective-epitaxial-growth SiGe-base heterojunction bipolar transistor (HBT) with self-aligned stacked metal/in-situ doped poly-Si (IDP) (referred to as SMI) electrodes is developed. A 0.5-μm-wide SiGe base self-aligned to the 0.1-μm-wide emitter was selectively grown by using a UHV/CVD system. This self-aligned structure effectively reduces collector capacitance. In SMI technology, a tungsten film is selectively stacked on all poly-Si electrodes (base, emitter, and collector) in a self-aligned manner by using selective deposition without any heat treatment. So this technology does not cause unwanted diffusion of the base dopants and keeps a shallow intrinsic base profile. SMI technology can therefore provide low parasitic resistances and is well-suited to an SiGe-base HBT. A 2-μm-wide BPSG/SiO2 refilled trench was introduced in order to reduce the substrate capacitance. The low dielectric constant of BPSG/SiO2 and the wide trench are very effective in reducing the sidewall element of substrate capacitance. This technology makes it possible to obtain ultra-high-speed operation with a 9.3-ps-gate-delay emitter-coupled-logic (ECL) circuit
Keywords :
Ge-Si alloys; bipolar logic circuits; emitter-coupled logic; heterojunction bipolar transistors; high-speed integrated circuits; semiconductor materials; vapour phase epitaxial growth; 9.3 ps; BPSG/SiO2 refilled trench; ECL gate delay; SMI electrode; SiGe; SiGe base HBT; UHV/CVD; W; emitter coupled logic circuit; heterojunction bipolar transistor; parasitic resistance; selective epitaxial growth; self-aligned stacked metal/in-situ doped polysilicon electrode; substrate capacitance; tungsten film; ultra-high-speed operation; Circuits; Dielectric constant; Dielectric substrates; Electrodes; Germanium silicon alloys; Heat treatment; Heterojunction bipolar transistors; Parasitic capacitance; Silicon germanium; Tungsten;
Journal_Title :
Electron Devices, IEEE Transactions on